作者 Yu, Haobo
書名 Software synthesis for System-on-Chip
國際標準書號 0496939637
book jacket
說明 147 p
附註 Source: Dissertation Abstracts International, Volume: 66-01, Section: B, page: 0383
Chairs: Daniel D. Gajski; Rainer Domer
Thesis (Ph.D.)--University of California, Irvine, 2005
Raising the level of abstraction to system level promises to enable faster exploration of the design space at early stages. While there are some approaches to synthesis hardware from the system models, today it is still a common practice to implement embedded soft ware manually on a prototype board during the last stage of system design. It is a tedious and error prone job. To speed up system design, developing software and hardware at the same time from system models seems to be the right solution, which means closing the gap between the high level models used for exploration and low level software implementation
We propose software synthesis as a solution to the problem of generating embedded software for System-on-Chip (SoC). Software synthesis is the translation process from a high level functionality specification to the low level software implementation. Several well defined design steps and design models are introduced in the software synthesis methodology. Starting from a HW/SW partitioned system model, the software part of the design is brought down to a binary implementation through scheduling refinement, code generation and RTOS targeting steps
In the software synthesis flow, from the input HW/SW partitioned model to the final cycle accurate implementation model, we proposed two intermediate system models for software generation: multi-task model and C model. These four models breaks the embedded software design gap into a set of successive synthesis steps. Furthermore, design decisions and algorithms for each synthesis step have been defined such that model refinement and decision making can be automated while supporting a wide range of HW/SW partitions and target implementations
The software synthesis flow and algorithms were developed and integrated into the System-on-Chip design Environment (SCE). Experiments using several industrial-strength examples demonstrate the feasibility and benefits of using software synthesis in system design
School code: 0030
DDC
Host Item Dissertation Abstracts International 66-01B
主題 Computer Science
Engineering, Electronics and Electrical
0984
0544
Alt Author University of California, Irvine