作者 Reddi, Vijay Janapa
書名 Resilient architecture design for voltage variation [electronic resource] / Vijay Janapa Reddi, Meeta Sharma Gupta
出版項 San Rafael, Calif. (1537 Fourth Street, San Rafael, CA 94901 USA) : Morgan & Claypool, c2013
國際標準書號 9781608456383 (electronic bk.)
9781608456376 (pbk.)
國際標準號碼 10.2200/S00486ED1V01Y201303CAC022 doi
book jacket
說明 1 electronic text (xv, 122 p.) : ill., digital file
系列 Synthesis lectures on computer architecture, 1935-3243 ; # 22
Synthesis digital library of engineering and computer science
Synthesis lectures in computer architecture ; # 22. 1935-3243
附註 Part of: Synthesis digital library of engineering and computer science
Series from website
Includes bibliographical references (p. 111-119)
1. Introduction -- 1.1 Parameter variations -- 1.2 Worst-case design -- 1.3 Design for the typical case -- 1.4 Scope of the book --
2. Modeling voltage variation -- 2.1 A quick primer -- 2.2 The power-delivery network (PDN) subsystem -- 2.2.1 Distributed grid model -- 2.2.2 Impulse-response-based model -- 2.2.3 Sparse grid model -- 2.3 Summary --
3. Understanding the characteristics of voltage variation -- 3.1 Current pulses -- 3.2 PDN characteristics -- 3.3 Microarchitectural events -- 3.4 Program behavior -- 3.5 Summary --
4. Traditional solutions and emerging solution forecast -- 4.1 Traditional static techniques -- 4.1.1 Voltage margins -- 4.1.2 Decoupling capacitors -- 4.1.3 Floorplanning -- 4.2 Toward dynamic techniques -- 4.2.1 Tolerance -- 4.2.2 Avoidance -- 4.2.3 Elimination -- 4.3 Summary --
5. Allowing and tolerating voltage emergencies -- 5.1 Error detection -- 5.2 Global recovery -- 5.2.1 Checkpoint recovery -- 5.2.2 Delayed commit and rollback -- 5.3 Local recovery -- 5.4 Razor -- 5.5 Summary --
6. Predicting and avoiding voltage emergencies -- 6.1 Sensor-based throttling -- 6.1.1 Design -- 6.1.2 Challenges -- 6.2 Event-based throttling -- 6.2.1 Single-event predictors -- 6.2.2 Signature-based prediction -- 6.3 Summary --
7. Eliminating recurring voltage emergencies -- 7.1 Opportunities and challenges -- 7.1.1 Opportunities -- 7.1.2 Challenges -- 7.2 Compiler techniques -- 7.2.1 Static compiler -- 7.2.2 Dynamic compiler -- 7.3 Thread scheduling -- 7.3.1 Interthread interference -- 7.3.2 Voltage smoothing -- 7.3.3 Benefits and tradeoffs -- 7.4 Summary --
8. Future directions on resiliency -- 8.1 System-level resiliency -- 8.2 Application-level resiliency --
Bibliography -- Authors' biographies
Abstract freely available; full-text restricted to subscribers or individual document purchasers
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Mode of access: World Wide Web
System requirements: Adobe Acrobat Reader
Shrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe the problem of voltage variation and the factors that influence this variation during processor design and operation. We also describe a variety of runtime hardware and software mitigation techniques that either tolerate, avoid, and/or eliminate voltage violations. We hope processor architects will find the information useful since tolerance, avoidance, and elimination are generalizable constructs that can serve as a basis for addressing other reliability challenges as well
Also available in print
Title from PDF t.p. (viewed on June 15, 2013)
Morgan & Claypool
鏈接 Print version: 9781608456376
主題 Microprocessors -- Power supply
Electric power system stability
voltage noise
voltage smoothing
di/dt
inductive noise
voltage emergencies
error detection
error correction
error recovery
transient errors
power supply noise
power delivery networks
Alt Author Gupta, Meeta Sharma