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作者 Abdel-Rahman, Osama A
書名 Entire load efficiency and dynamic performance improvements for DC-DC converters
說明 200 p
附註 Source: Dissertation Abstracts International, Volume: 68-03, Section: B, page: 1808
Adviser: Issa Batarseh
Thesis (Ph.D.)--University of Central Florida, 2007
Demands for DC-DC converters are continuously increasing for the application in many areas such as telecommunications, cellular telephones, networking products, notebook and desktop computers, industrial instrumentation, and automotive electronics. These areas are continually being upgraded with regard to their specifications and power requirements; this puts the emphasis on power electronics and power management. DC-DC converters are able to supply energy at high standards and specifications, which leads DC-DC converters to be continually upgraded in order to fulfill other application requirements such as efficiency, dynamic performance, thermo, noise and size
The scope of this work can be summarized into three main aspects for DC-DC power converters. The first aspect is soft switching topologies to improve conversion efficiency for On-Board Converters or Point of load (POL) converters (chapters 2, 3); the second aspect is load adaptive control techniques to improve all load efficiency for battery powered DC-DC converters that are applied to mobile devices (chapters 4, 5); and the third aspect is dynamic performance control techniques to improve load transient in voltage regulators (chapters 6, 7). Topologies and control techniques for DC-DC converters are presented after reviewing loads powering requirements and steady-state and transients design challenges
Following is a quick overview of the presented topologies and control techniques that sum up the work of this research: (1) In chapter 2, Active Resonant Tank (ART) cells are presented to achieve Zero-Voltage- Switching (ZVS) and eliminate body-diode conduction and its reverse recovery in dc-dc converters with Synchronous Rectifiers (SRs). ART cells extend the benefits of utilizing SRs to higher voltage applications, since switching losses tend to be more significant in higher voltage ratings SRs because they have worse parasitic. The concept of current injection in ART cells is generally introduced and detailed analyses are provided based on a buck converter. Experimental results show that efficiency improvement is achieved due to the reduced switching loss, body diode's conduction, and reverse-recovery loss. (2) In chapter 3, LCC ZVS Buck Converter with Synchronous Rectifier is presented. The concept of the LCC ZVS buck converter topology introduces an inductive load in the bridge leg and changes the switching commutation mechanism of the SR to achieve Zero-Voltage-Switching (ZVS) and eliminate body-diode conduction and its reverse. Compared with the conventional SR buck converter, reverse-recovery-related switching and ringing loss are eliminated; compared with QSW buck converter, the output current ripple is significantly reduced and the output capacitance is dramatically reduced. (3) In chapter 4, load Adaptive Control for Improved Light Load Efficiency and Performance of Voltage Regulator (VR) is presented. Analytical studies of VR losses and voltage ripple deviation are presented and discussed, yielding to proposed control technique, namely "Pulse Sliding**" (PSL) control technique, which results in improved VR conversion efficiency with low and controlled voltage ripple and improved dynamic response. The presented control method achieves the advantages of both variable frequency and fixed frequency controls and eliminates their disadvantages by utilizing information obtained from the inductor peak current, compensation error signal and output capacitor current, resulting in an optimum non-linear switching frequency modulation. PSL is compared with other control methods by both analyses and experiments. (4) In chapter 5, a load adaptive voltage regulator that achieves high efficiency extended to light and heavy load regions is presented. It is named as "Adaptive FET Modulation" (AFM) since multiple FETs with different specifications are paralleled; the number of driven FETs and their gate driving voltage are adaptive to load current. The capability of adaptive modulation of FETs' parasitic charges and resistances along with adaptive gate driving voltage allows achieving the best FET optimization for wide load range. AFM operates at fixed switching frequency for almost the whole load range, so it has no affect on the conventional buck operation and its dynamic performance, in addition to having simple implementation. (5) In chapter 6, the discussion centers upon a control method that dynamically modulates the PWM ramp signal peak during DCM or Mode Hoping operation with inverse relationship to the compensator error signal, as a result modulate the PWM modulator gain to minimize the required error signal change during load transient, so that the compensator reaches steady state faster and lower output voltage deviation during load transient is achieved. (6) In chapter 7, an approach to significantly limit the voltage overshoot and undershoot during load transient and reduces the number of capacitors, without compromising on the efficiency, cost or size of the dc/dc converter. It allows optimization of power stage efficiency for the dc operation with less concern of dynamic performance, while an additional switching circuit; that utilizes the output capacitor current to rapidly detect load transient; is activated during load step up to deliver the shortage charge to the output capacitor, and to pull out the extra charge from the output capacitor during load step down. Therefore, lower voltage deviation is achieved during load transient. (7) Finally, the work is summarized and concluded, and references are listed
School code: 0705
DDC
Host Item Dissertation Abstracts International 68-03B
主題 Engineering, Electronics and Electrical
0544
Alt Author University of Central Florida
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