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Author Bell, Steven, author
Title Compiling algorithms for heterogeneous systems / Steven Bell, Jing Pu, James Hegarty, Mark Horowitz
Imprint [San Rafael, California] : Morgan & Claypool, 2018
book jacket
Descript 1 online resource (xv, 89 pages) : illustrations
text rdacontent
electronic isbdmedia
online resource rdacarrier
Series Synthesis lectures on computer architecture, 1935-3243 ; # 43
Synthesis digital library of engineering and computer science
Synthesis lectures in computer architecture ; # 43. 1935-3243
Note Part of: Synthesis digital library of engineering and computer science
Includes bibliographical references (pages 83-87)
1. Introduction -- 1.1 CMOS scaling and the rise of specialization -- 1.2 What will we build now? -- 1.2.1 Performance, power, and area -- 1.2.2 Flexibility -- 1.3 The cost of specialization -- 1.4 Good applications for acceleration --
2. Computations and compilers -- 2.1 Direct specification -- 2.2 Compilers -- 2.3 High-level synthesis -- 2.4 Domain-specific languages --
3. Image processing with stencil pipelines -- 3.1 Image signal processors -- 3.2 Example applications --
4. Darkroom: a stencil language for image processing -- 4.1 Language description -- 4.2 A simple pipeline in darkroom -- 4.3 Optimal synthesis of line-buffered pipelines -- 4.3.1 Generating line-buffered pipelines -- 4.3.2 Shift operator -- 4.3.3 Finding optimal shifts -- 4.4 Implementation -- 4.4.1 ASIC and FPGA synthesis -- 4.4.2 CPU compilation -- 4.5 Evaluation -- 4.5.1 Scheduling for hardware synthesis -- 4.5.2 Scheduling for general-purpose processors -- 4.6 Summary --
5. Programming CPU/FPGA systems from Halide -- 5.1 The Halide language -- 5.2 Mapping Halide to hardware -- 5.3 Compiler implementation -- 5.3.1 Architecture parameter extraction -- 5.3.2 IR transformation -- 5.3.3 Loop perfection optimization -- 5.3.4 Code generation -- 5.4 Implementation and evaluation -- 5.4.1 Programmability and efficiency -- 5.4.2 Quality of hardware generation -- 5.5 Conclusion --
6. Interfacing with specialized hardware -- 6.1 Common interfaces -- 6.2 The challenge of interfaces -- 6.3 Solutions to the interface problem -- 6.3.1 Compiler support -- 6.3.2 Library interface -- 6.3.3 API plus DSL -- 6.4 Drivers for darkroom and halide on FPGA -- 6.4.1 Memory and coherency -- 6.4.2 Running the hardware -- 6.4.3 Generating systems and drivers -- 6.4.4 Generating the whole stack with Halide -- 6.4.5 Heterogeneous system performance --
7. Conclusions and future directions -- Bibliography -- Authors' biographies
Abstract freely available; full-text restricted to subscribers or individual document purchasers
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Most emerging applications in imaging and machine learning must perform immense amounts of computation while holding to strict limits on energy and power. To meet these goals, architects are building increasingly specialized compute engines tailored for these specific tasks. The resulting computer systems are heterogeneous, containing multiple processing cores with wildly different execution models. Unfortunately, the cost of producing this specialized hardware--and the software to control it--is astronomical. Moreover, the task of porting algorithms to these heterogeneous machines typically requires that the algorithm be partitioned across the machine and rewritten for each specific architecture, which is time consuming and prone to error. Over the last several years, the authors have approached this problem using domain-specific languages (DSLs): high-level programming languages customized for specific domains, such as database manipulation, machine learning, or image processing. By giving up generality, these languages are able to provide high-level abstractions to the developer while producing high-performance output. The purpose of this book is to spur the adoption and the creation of domain-specific languages, especially for the task of creating hardware designs. In the first chapter, a short historical journey explains the forces driving computer architecture today. Chapter 2 describes the various methods for producing designs for accelerators, outlining the push for more abstraction and the tools that enable designers to work at a higher conceptual level. From there, Chapter 3 provides a brief introduction to image processing algorithms and hardware design patterns for implementing them. Chapters 4 and 5 describe and compare Darkroom and Halide, two domain-specific languages created for image processing that produce high-performance designs for both FPGAs and CPUs from the same source code, enabling rapid design cycles and quick porting of algorithms. The final section describes how the DSL approach also simplifies the problem of interfacing between application code and the accelerator by generating the driver stack in addition to the accelerator configuration. This book should serve as a useful introduction to domain-specialized computing for computer architecture students and as a primer on domain-specific languages and image processing hardware for those with more experience in the field
Also available in print
Title from PDF title page (viewed on January 26, 2018)
Link Print version: 9781627059619 9781681732633
Subject Domain-specific programming languages
Image processing -- Digital techniques
domain-specific languages
high-level synthesis
image processing accelerators
stencil computation
Electronic books
Alt Author Pu, Jing, author
Hegarty, James, author
Horowitz, Mark, author
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