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Title
Tutorial test generation for VLSI chips / [edited by] Vishwani D. Agrawal and Sharad C. Seth
Imprint
Washington, D.C. : Computer Society Press ; Los Angeles, CA : Order from Computer Society, c1988
LOCATION
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OPACMSG
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Inform. Sci. Books
B7.3 A277
AVAILABLE
30330000061783
Descript
x, 401 p. : ill. ; 29 cm
Subject
Integrated circuits -- Very large scale integration -- Testing
Automatic checkout equipment
VLSI testing iisf
Alt Author
Agrawal, Vishwani D., 1943-
Seth, Sharad C
IEEE Computer Society
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