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書名 Logic minimization algorithms for VLSI synthesis / by Robert K. Brayton ... [et al.]
出版項 Boston : Kluwer Academic Publishers, c1984
國際標準書號 0898381649
 book jacket
館藏地 索書號 處理狀態 OPAC 訊息 條碼
 資訊所圖書室圖書區  B7.1 L8325    在架上    30330000006622
說明 ix, 193 p. : ill. ; 25 cm
系列 The Kluwer international series in engineering and computer science ; SECS 2. VLSI, computer architecture, and digital signal processing
Kluwer international series in engineering and computer science ; SECS 2
Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing
附註 Bibliography: p. [174]-190
Includes index
主題 Logic design
Integrated circuits -- Very large scale integration
Integrated circuits -- Design and construction -- Data processing
Algorithms
VLSI iis
Alt Author Brayton, Robert King
Alt Title Logic minimization algorithms for V.L.S.I. synthesis
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