MARC 主機 00000cam  2200349Mu 4500 
001    781555071 
003    OCoLC 
005    20120712043125.0 
008    120110s2011    ja a     b    100 0 eng d 
020    9784931469662 
020    4931469663 
035    (OCoLC)781555071|z(OCoLC)767806774|z(OCoLC)773023444 
040    CLS|cCLS|dYDXCP|dBTCTA|dAS|dMATH 
050 14 TK7871.85|b.H512 2011 
090    TK7871.85/H512/2011/////52225 
245 00 Hierarchy of semiconductor equations :|brelaxation limits 
       with initial layers for large innitial data /|cShinya 
       Nishibata, Masahiro Suzuki 
260    Tokyo :|bMathematical Society of Japan,|c2011 
300    ix, 109 p. :|bill. ;|c25 cm 
490 1  MSJ memoirs ;|vvol. 26 
504    Includes bibliographical references (p. 107-109) 
650  0 Semiconductors|xMathematical models 
700 1  Nishibata, Shinya 
700 1  Suzuki, Masahiro 
830  0 MSJ memoirs ;|vv. 26 
館藏地 索書號 處理狀態 OPAC 訊息 條碼
 數學所圖書室  TK7871.85 H512 2011    在架上    30340200522252